A low-power, low phase noise CMOS VCO with suppression of 1/f flicker noise up-conversion

This paper proposes a low-power, low close-in phase-noise voltage-controlled oscillator (VCO) based on Colpitts oscillator. The VCO stacks the Colpitts VCO with a negative conductance cell. By exploiting a bias-level shifting technique, the proposed VCO provides larger output swing, and the close-in phase noise characteristics is improved impressively while consuming very low power. The proposed VCO is designed and simulated in 65nm CMOS technology operating at 2.6 GHz with only 0.12mA core current consumption from 0.5V supply voltage. The simulated phase noise of the proposed VCO is -27.6 dBc/Hz at 100 Hz offset, -54.4 dBc/Hz at 1 kHz offset, and -117.7 dBc/Hz at 1MHz offset frequency, respectively. The calculated figure of merit (FOM) is about -198 dBc/Hz at 1MHz offset. Compared to that of the conventional VCO, the phase noise performance is significantly improved by more than 20 dB from 100 Hz to 1 kHz offset, around 15 dB at 10 kHz offset, and 6 dB at 1MHz offset frequency, respectively.