Design and Realization of a 13-bit Serial to Parallel GaAs Digital Circuit for 6-18 GHz T/R Module

被引:0
|
作者
Jiang, Yifan [1 ]
Jiang, Xin [2 ]
Li, Yao [2 ]
Hong, Wei [1 ]
机构
[1] Southeast Univ, State Key Lab Millimeter Waves, Nanjing 2010096, Jiangsu, Peoples R China
[2] Milliway IC Corp, Nanjing 211111, Jiangsu, Peoples R China
关键词
Serial to Parallel; GaAs; Enhancement Depletion (ED) PHEMT; T/R module;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a 13-bit serial to parallel GaAs digital circuit based on GaAs 0.15um Enhancement-Depletion(ED) PHEMT has been realized and measured. This serial to parallel circuit is designed for the 6-18 GHz T/R module, it controls 1-bit switch, 6-bit shifter and 6-hit attenuator. This GaAs logic circuit could reduce the size of T/R module chip and improve the integration degree of the system. The simulated and measured data on some basic logic cells (NOR logic gate, levelshifter) is shown in the paper. We also tested a 6-bit serial to parallel logic testcell. The 13-bit serial to parallel logic circuit work successfully in the whole T/R module.
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页数:3
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