Towards a more efficient run-time FPGA configuration generation

被引：1

作者：

Abouelella, Fatma ^{[1
]}

Bruneel, Karel ^{[1
]}

Stroobandt, Dirk ^{[1
]}

机构：

[1] Univ Ghent, ELIS, St Pietersnieuwstr 41, B-9000 Ghent, Belgium

来源：

PARALLEL COMPUTING: FROM MULTICORES AND GPU'S TO PETASCALE | 2010年 / 19卷

关键词：

FPGA; Parameterizable Bitstream; Stack Machine;

D O I：

10.3233/978-1-60750-530-3-624

中图分类号：

TP31 [计算机软件];

学科分类号：

081202 ; 0835 ;

摘要：

Parameterizable configurations are regular FPGA configurations in which some of the configuration bits are expressed as a Boolean function of a set of parameters. These configurations can rapidly be transformed to a specialized configuration by evaluating the Boolean functions for a specific set of parameter values and are therefore ideal for use in run-time reconfigurable systems. In this paper, the concept of Parameterizable Bitstream (PBS) is introduced to accommodate the use of parameterizable configurations in commercial FPGAs. A stack machine system is implemented that can efficiently transform a PBS to a specialized configuration.

引用

页码：624 / 631

页数：8

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