Non-volatile nano-floating gate memory with Pt-Fe2O3 composite nanoparticles and indium gallium zinc oxide channel

被引:7
|
作者
Hu, Quanli [1 ]
Lee, Seung Chang [2 ]
Baek, Yoon-Jae [2 ]
Lee, Hyun Ho [3 ]
Kang, Chi Jung [1 ,4 ]
Kim, Hyun-Mi [5 ]
Kim, Ki-Bum [5 ]
Yoon, Tae-Sik [1 ,2 ]
机构
[1] Myongji Univ, Dept Nano Sci & Engn, Yongin 449728, Gyeonggi Do, South Korea
[2] Myongji Univ, Dept Mat Sci & Engn, Yongin 449728, Gyeonggi Do, South Korea
[3] Myongji Univ, Dept Chem Engn, Yongin 449728, Gyeonggi Do, South Korea
[4] Myongji Univ, Dept Phys, Yongin 449728, Gyeonggi Do, South Korea
[5] Seoul Natl Univ, Dept Mat Sci & Engn, Seoul 151742, South Korea
基金
新加坡国家研究基金会;
关键词
Composite nanoparticles; One-step synthesis; Nano-floating gate memory; Oxide semiconductor; MAGNETIC-PROPERTIES; LAYER; NANOCRYSTALS; SIO2; SUBSTRATE; DEVICE;
D O I
10.1007/s11051-013-1435-6
中图分类号
O6 [化学];
学科分类号
0703 ;
摘要
Non-volatile nano-floating gate memory characteristics with colloidal Pt-Fe2O3 composite nanoparticles with a mostly core-shell structure and indium gallium zinc oxide channel layer were investigated. The Pt-Fe2O3 nanoparticles were chemically synthesized through the preferential oxidation of Fe and subsequent pileup of Pt into the core in the colloidal solution. The uniformly assembled nanoparticles' layer could be formed with a density of similar to 3 x 10(11) cm(-2) by a solution-based dip-coating process. The Pt core (similar to 3 nm in diameter) and Fe2O3-shell (similar to 6 nm in thickness) played the roles of the charge storage node and tunneling barrier, respectively. The device exhibited the hysteresis in current-voltage measurement with a threshold voltage shift of similar to 4.76 V by gate voltage sweeping to +30 V. It also showed the threshold shift of similar to 0.66 V after pulse programming at +20 V for 1 s with retention > similar to 65 % after 10(4) s. These results demonstrate the feasibility of using colloidal nanoparticles with core-shell structure as gate stacks of the charge storage node and tunneling dielectric for low-temperature and solution-based processed non-volatile memory devices.
引用
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页数:9
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