Modeling of the impact of parameter spread on the switching performance of parallel-connected SIC VJFETs

Operation of parallel-connected 4H-SiC VJFETs from SemiSouth was measured and modeled using numerical simulations. The unbalanced current waveforms in parallel-connected VJFETs were related to spread in the critical parameters of the device structure and to the influence of the parasitic inductances in the measurement circuit. The physical device structure was reconstructed based on SEM analysis, electrical characterization, and device simulations. The two hypothetical critical design parameters that were studied with respect to spread were the p-gate doping profile (Case 1) and the emitter doping (Case 2). Variation in both parameters could be related to variation in the emitter breakdown voltage, the on-state characteristics, and the threshold voltage of the experimental devices. The switching performance of the parallel-connected JFETs was measured using a single gate driver in a double pulse test and compared with simulations. In both investigated cases a very good agreement between measurements and simulations was obtained. The modeling of the transient performance relies on good reproduction of transfer characteristics and circuit parasitics.