Cosimulation of ITRON-based embedded software with SystemC

被引：3
|
作者：
Chikada, S [1 ]
Honda, S [1 ]
Tomiyama, H [1 ]
Takada, H [1 ]
机构：
[1] Nagoya Univ, Grad Sch Informat Sci, Nagoya, Aichi, Japan
来源：
HLDVT'05: TENTH ANNUAL IEEE INTERNATIONAL HIGH-LEVEL DESIGN VALIDATION AND TEST WORKSHOP, PROCEEDINGS | 2005年
关键词：
D O I：
10.1109/HLDVT.2005.1568816
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents an RTOS-centric timed cosimulation with SystemC for embedded system design. In our cosimulation environment, a SystemC simulator and an RTOS kernel model are communicated and synchronized with each other. Our experiment using a JPEG decoder example demonstrates an improvement in cosimulation speed over traditional HDL-based cosimulation.
引用
收藏
页码：71 / 76
页数：6
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