Network on Chip for DTMF Decoder and TDM Switching in Telecommunication Network with HDL Environment

被引:0
|
作者
Kumar, Adesh [1 ]
Singhal, Sonal [2 ]
Kuchhal, Piyush [3 ]
Kumar, Amit [4 ]
机构
[1] Univ Petr & Energy Studies, Dept Elect Engn, Dehra Dun, India
[2] Shiv Nadar Univ, Dept Elect Engn, G B Nagar, Uttar Pradesh, India
[3] Univ Petr & Energy Studies, Dept Phys, Dehra Dun, India
[4] Uttaranchal Inst Technol Dehradun, Dept Comp Sci, Dehra Dun, India
关键词
Very High Speed Integrated Circuit; Very Large Scale of Integration; Field Programmable Gate Array; Time Division Multiplexing;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
The communication switching system enables the universal connectivity. The universal connectivity is realized when any entity in one part of the world can communicate with any other entity in another part of the world. In many ways telecommunication will acts as a substitute for the increasingly expensive physical transportation. The telecommunication links and switching were mainly designed for voice communication. Traffic handling capacity is an important element of service quality and will therefore play a basic role in this choice Microprocessor/ microcontroller (MPMC) system can handle sequential operations with high flexibility and use of Field Programmable Gate Array (FPGA) can handle concurrent operations with high speed in small size area. So combined features of both these systems can enhance the performance of the system. High Performance Hybrid Telephone Network System (HTSS) is designed using combination of stored program control (SPC) and VLSI technology. Touch tone receiver follows DTMF (Dual tone Multifrequency) concept and Time division multiplexing chip is used for the call establishment for inter and intra communication.
引用
收藏
页码:1582 / 1588
页数:7
相关论文
共 50 条
  • [1] Low Power Implementation of Telecommunication Switching Architectures for Network on Chip
    Verma, Gaurav
    Shekhar, Sushant
    Maheshwari, Shikhar
    Virdi, Sukhbani Kaur
    PROCEEDINGS OF THE 10TH INDIACOM - 2016 3RD INTERNATIONAL CONFERENCE ON COMPUTING FOR SUSTAINABLE GLOBAL DEVELOPMENT, 2016, : 2004 - 2007
  • [2] Neural network and DSP based decoder for DTMF signals
    Daponte, P
    Grimaldi, D
    Micheali, L
    IEE PROCEEDINGS-SCIENCE MEASUREMENT AND TECHNOLOGY, 2000, 147 (01) : 34 - 40
  • [3] Design and FPGA Synthesis of Three Stage Telecommunication Switching in HDL Environment
    Kumar, Adesh
    Kuchhal, Piyush
    Singhal, Sonal
    INTERNATIONAL CONFERENCE ON COMPUTER, COMMUNICATION AND CONVERGENCE (ICCC 2015), 2015, 48 : 454 - 460
  • [4] An Area-efficient Network Interface for a TDM-based Network-on-Chip
    Sparso, Jens
    Kasapaki, Evangelia
    Schoeberl, Martin
    DESIGN, AUTOMATION & TEST IN EUROPE, 2013, : 1044 - 1047
  • [5] TDM virtual-circuit configuration for network-on-chip
    Lu, Zhonghai
    Jantsch, Axel
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2008, 16 (08) : 1021 - 1034
  • [6] A TDM test scheduling method for network-on-chip systems
    Nolen, John Mark
    Mahapatra, Rabi
    MTV 2005: SIXTH INTERNATIONAL WORKSHOP ON MICROPRESSOR TEST AND VERIFICATION: COMMON CHALLENGES AND SOLUTIONS, PROCEEDINGS, 2006, : 90 - +
  • [7] Improving Network-on-Chip-based Turbo Decoder Architectures
    Maurizio Martina
    Guido Masera
    Journal of Signal Processing Systems, 2013, 73 : 83 - 100
  • [8] Improving Network-on-Chip-based Turbo Decoder Architectures
    Martina, Maurizio
    Masera, Guido
    JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2013, 73 (01): : 83 - 100
  • [9] Power Allocation Method for TDM-Based Optical Network on Chip
    Wang, Zhengyu
    Gu, Huaxi
    Yang, Yintang
    Zhang, Bixia
    IEEE PHOTONICS TECHNOLOGY LETTERS, 2013, 25 (10) : 973 - 976
  • [10] Global routing for multicast-supporting TDM network-on-chip
    Liu, J
    Zheng, LR
    Tenhunen, H
    2004 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP, PROCEEDINGS, 2004, : 17 - 20