A formal study on topology and floorplan characteristics of mesh and torus-based optical networks-on-chip

被引:22
|
作者
Feng, Kai [1 ]
Ye, Yaoyao [1 ]
Xu, Jiang [1 ]
机构
[1] Hong Kong Univ Sci & Technol, Dept Elect & Comp Engn, Hong Kong, Hong Kong, Peoples R China
关键词
Multiprocessor; Optical network-on-chip; Mesh; Torus; Floorplan;
D O I
10.1016/j.micpro.2012.06.010
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The efficiency of collaboration among processors is a critical design metric for multiprocessor systems-on-chip (MPSoCs). It is the communication architecture that determines the collaboration efficiency on the hardware side. Optical NoCs, which are based on optical interconnects and optical routers, offer a new approach to empowering ultra-high bandwidth with low power consumption. In this paper, we provide a detailed study on the floorplans of optical NoCs in two popular two-dimensional topologies: mesh and torus. The study covers important design metrics for mesh and torus-based optical NoCs, such as the number of waveguide crossings in the floorplan and the number of paths and hops. We summarize the results into equations, taking all the dimensional cases into consideration. Based on this study, as well as the properties of the XY routing algorithm, we propose several approaches to optimize the power efficiency of optical NoCs by minimizing the number of waveguide crossings in the floorplan. We show the optimization procedures for torus-based optical NoCs in all possible cases. Comparison results show that the floorplan optimization reduces waveguide crossings significantly within the entire network as well as in longest paths. As is suggested in this paper, the number of waveguide crossings represents power loss in the optical NoC. By minimizing the number of waveguide crossings in the optimized floorplans, the energy efficiency of the optical NoC is improved than the original designs. (C) 2012 Elsevier B.V. All rights reserved.
引用
收藏
页码:941 / 952
页数:12
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