An eight channel low-noise CMOS readout circuit for silicon detectors with on-chip front-end FET

We propose a CNIOS readout circuit for the processing of signals from multi-channel silicon detectors to be used in X-ray spectroscopy and gamma-ray imaging applications. The circuit is composed by eight channels, each one featuring a low-noise preamplifier, a 6th-order semigaussian shaping amplifier with four selectable peaking times, from 1.8 up to 6 mu s, a peak stretcher and a discriminator. The circuit is conceived to be used with silicon detectors with a front-end FET integrated on the detector chips itself, like silicon drift detectors with JFET and pixel detectors with DEPMOS. The integrated time constants used for the shaping are implemented by means of an RC-cell, based on the technique of demagnification of the current flowing in a resistor R by means of the use of current mirrors. The eight analog channels of the chip are multiplexed to a single analog output. A suitable digital section provides self-resetting of each channel and trigger output and is able to set independent thresholds on the analog channels by means of a programmable serial register and 3-bit DACs. The circuit has been realized in the 0.35 mu m CMOS AMS technology. In this work, the main features of the circuit are presented along with the experimental results of its characterization. (c) 2006 Elsevier B.V. All rights reserved.