System on Chip Cores for Protection and Commutation of a Matrix Converter

被引：0

作者：

Ormaetxea, Enekoitz ^{[1
]}

Andreu, Jon ^{[1
]}

Kortabarria, Inigo ^{[1
]}

Martinez de Alegria, Inigo ^{[1
]}

Ibarra, Edorta ^{[1
]}

Olaguenaga, Ekaitz ^{[2
]}

机构：

[1] Univ Basque Country, Dep Elect & Telecomm, Bilbao, Spain

[2] TECNALIA, Energy Unit, Derio, Spain

来源：

PROCEEDINGS OF 14TH INTERNATIONAL POWER ELECTRONICS AND MOTION CONTROL CONFERENCE (EPE-PEMC 2010) | 2010年

关键词：

Matrix Converter; System on Chip (SoC); Field Programmable Gate Array (FPGA); Core;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This article deals with the implementation of the commutation and protection of the matrix converter (MC) via some hardware blocks (cores) implemented in an FPGA. Thanks to the computational capacity of the cores, processing time is reduced. This allows a response in real time improving the safety of the MC.

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页数：7

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