Manufacturing process of double-poly CMOS IC for digital-analogue mixed signals

A double-poly CMOS processing for digital-analogue mixed signal ASIC is discussed in this paper, which is formed on the bases of standard CMOS processing and includes some special devices for digital-analogue mixed signal ASIC, such as polysilicon re-sisters and double polysilicon capa-citors. These polysilicon resistors and polysilicon capacitors are fabricated by a processing compatible with standard CMOS processing and integrated on the CMOS ASIC during the CMOS ASIC manufacturing process. Two layers of LPCVD polysilicon are used in this process. The first layer of poly-silicon is used to manufacture the gates for P-channel and N-channel MOS tran-sistors and bottom electrodes of the polysilicon capacitors. After oxidation of the first layer of polysilicon, the second layer of polysilicon is deposited. Two different implantations are implemented on the second layer of polysilicon. One is a large dose of P+ implantation to form the upper electrode of the poly-silicon capacitor, another is a suitable dose of BF2+ implantation to get re-quired resistance value of polysilicon re-sisters. The characteristics of the poly-silicon resistors and double poysilicon capacitors are discussed in this paper. The relationship between the resistance value of polysilicon and BF2+ implantation dose is established.