Asymmetric Redundancy: An Enhanced Redundancy Strategy for MLC NAND Flash Memory Storage Systems

For Multi-Level Cell (MLC) NAND flash, which is a main-stream product with two bits per cell, redundancy method has been widely adopted to enhance the reliability of the system data. In particular, it is used to enhance metadata reliability because the damage of metadata may cause the system to crash and a large amount of data to be lost. However, for MLC NAND flash with asymmetric distribution of bit errors between least significant bit (LSB) pages and most significant bit (MSB) pages, the arbitrary distribution strategy, for replicas of the traditional redundancy method will degrade of effectiveness of the redundancy method. This paper presents Asymmetric Redundancy method, an enhanced redundancy strategy for MLC NAND flash memory storage systems. Our technique for the first time exploits the property of the multi-page architecture of MLC; NAND flash memory to change the allocation of metadata and its replicas. We can achieve much more reliable storage system compared with traditional redundancy methods. We have implemented Asymmetric Redundancy on a real hardware platform. The experimental results show that Asymmetric Redundancy can reduce uncorrectable page errors by up to 98.33% and 81.13% compared to baseline and Meta-Cure, respectively.