Readout demonstrator for a large-scale pixel-detector conforming to the ATLAS Phase-II Upgrade

After a long design and development, a prototype of the pixel detector front-end readout chip is proposed for the HL-LHC ATLAS and CMS upgrades. It provides data streams using up to four lanes running at 1.28 Gbps each. In parallel to that, an off-detector high-speed electronic readout system card, namely FELIX, has been developed and proposed to be shared among the ATLAS sub-detectors. This paper describes in detail the implementation of a full readout chain for the front-end readout chip, namely the RD53A, using the current ATLAS Phase-II readout FELIX card. For this work the readout chain has required dedicated electronics as a hardware interface between the front-end chip and the off-detector readout. Moreover, to maximize the efficiency of testing the chip and to realize the readout chain, it is extremely important that, even for the first prototypes, the DAQ chain is as similar as possible to the final one. The implemented chain has been left available at CERN for further tests and developments for the entire ATLAS TDAQ collaboration. This readout chain is proposed as a general readout test-stand for Large-Scale Application of pixel detectors. Full details of the prototype and testing performed to date are presented.