Using FPGA and CPLD ICs to achieve High-frequency PWM

被引：1

作者：

Fu, Wei ^{[1
]}

Yu, HaiBin ^{[2
]}

机构：

[1] Honghe Univ, Inst Engn, Mengzi, Yunnan Province, Peoples R China

[2] Hangzhou Dianzi Univ, Coll Elect & Informat, Hangzhou, Zhejiang, Peoples R China

来源：

ADVANCED MATERIALS AND INFORMATION TECHNOLOGY PROCESSING, PTS 1-3 | 2011年 / 271-273卷

关键词：

FPGA; CPLD; Synchronous binary counter; PWM; High-Frequency;

D O I：

10.4028/www.scientific.net/AMR.271-273.314

中图分类号：

G40 [教育学];

学科分类号：

040101 ; 120403 ;

摘要：

PWM (Pulse width modulation) has been widely used in power converter control. This paper is the development of a high-frequency PWM generator architecture for power converter control using FPGA and CPLD ICs. The proposed architecture is based on a special design synchronous binary counter and can be easily interfaced to a microcontroller or DSP system. The resulting PWM frequency depends on the target FPGA or CPLD device speed grade and the duty cycle resolution requirements.

引用

页码：314 / +

页数：2

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