Quantification and Localization of Cross-Core Interference for Embedded Multi-Core Control Applications

This paper presents an analysis approach to the quantification and localization of multi-core interference for applications controlling mechatronic systems. The analysis focuses on the execution of several control applications, each dedicated to one core of an embedded multi-core microprocessor. Based on timed instruction traces for the single-core execution of each application, we first extract a bus access trace under consideration of an out-of-order execution of store instructions. The bus access trace is then used to calculate the cross-core contentions for each instruction. The calculation uses time characteristics of the applications emerging from the design of the control of physical systems. The analysis approach integrates hardware-related timings to apply the analysis to a wide range of multi-core microcontrollers. Experimental results indicate accuracy between 93.83% and 99.93% of the calculated quantity of cross-core contentions. The contention data can be used to determine multi-core runtimes and build contention traces for the application execution. To reduce cross-core contentions and maintain the real-time behavior of control applications, the obtained contention information contributes to further analyses for the application design, implementation and integration processes.