New computation paradigm for modular exponentiation using a graph model

被引:0
|
作者
Park, CS [1 ]
Lee, MK
Kim, DK
机构
[1] Pusan Natl Univ, Pusan 609735, South Korea
[2] Inha Univ, Inchon 402751, South Korea
关键词
exponentiation; modular exponentiation; graph model; window method;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Modular exponentiation is to compute x(E) mod N for positive integers x, E, and N. It is an essential operation for various public-key cryptographic algorithms such as RSA, ElGamal and DSA, and it is crucial to develop fast modular exponentiation methods for efficient implementation of the above algorithms. To accelerate modular exponentiation, one can either speed up each multiplication or reduce the number of required multiplications. We focus on the latter. In this paper, we propose a general model to describe the behavior of modular exponentiation in terms of a graph. First, we show that the problem of finding the minimum number of multiplications for a modular exponentiation is equivalent to finding a shortest path in its corresponding graph. The previously known exponentiation algorithms including the binary method, the M-ary method and the sliding window method can be represented as a specific instance of our model. Next, we present a general method to reduce the number of required multiplications by modifying the pre-computation table which is used for the sliding window method. According to our experimental results, the new method significantly reduces the number of multiplications, especially in the cases that the exponent E has a high Hamming weight.
引用
收藏
页码:170 / 179
页数:10
相关论文
共 50 条
  • [21] Efficient hardware for modular exponentiation using the sliding-window method
    Nedjah, Nadia
    Mourelle, Luiza de Macedo
    da Silva, Rodrigo Martins
    INTERNATIONAL CONFERENCE ON INFORMATION TECHNOLOGY, PROCEEDINGS, 2007, : 17 - +
  • [22] Implementing Montgomery Multiplication to Speed-Up the Computation of Modular Exponentiation of Multi-Bit Numbers
    Prots'ko, I.
    Gryshchuk, A.
    CYBERNETICS AND SYSTEMS ANALYSIS, 2024, 60 (05) : 826 - 833
  • [23] Numerical analysis of parallel modular exponentiation for RSA using interconnection networks
    Damrudi, Masumeh
    Ithnin, Norafida
    SCIENCEASIA, 2013, 39 : 103 - 106
  • [24] Fast modular multi-exponentiation using modified complex arithmetic
    Wu, Chia-Long
    Lou, Der-Chyuan
    Lai, Jui-Chang
    Chang, Te-Jen
    APPLIED MATHEMATICS AND COMPUTATION, 2007, 186 (02) : 1065 - 1074
  • [25] Low Power Modular Integer Exponentiation using Discrete Logarithm Transformation
    Byers, Micah
    Di, Jia
    2008 1ST MICROSYSTEMS AND NANOELECTRONICS RESEARCH CONFERENCE, 2008, : 113 - 116
  • [26] Using Templates to Attack Masked Montgomery Ladder Implementations of Modular Exponentiation
    Herbst, Christoph
    Medwed, Marcel
    INFORMATION SECURITY APPLICATIONS, 2009, 5379 : 1 - 13
  • [27] Efficient hardware for modular exponentiation using the sliding-window method
    Department of Electronics Engineering and Telecommunications, State University of Rio de Janeiro, Rio de Janeiro, Brazil
    不详
    Int. J. High Perform. Syst. Archit., 2008, 3 (199-206):
  • [28] Minimal addition chain for efficient modular exponentiation using genetic algorithms
    Nedjah, N
    Mourelle, LD
    DEVELOPMENTS IN APPLIED ARTIFICAIL INTELLIGENCE, PROCEEDINGS, 2002, 2358 : 88 - 98
  • [29] CONFIGURABLE HARDWARE - A NEW PARADIGM FOR COMPUTATION
    GRAY, JP
    KEAN, TA
    ADVANCED RESEARCH IN VLSI : PROCEEDINGS OF THE DECENNIAL CALTECH CONFERENCE ON VLSI, 1989, : 279 - 295
  • [30] SoC-based implementation for modular exponentiation using evolutionary addition chains
    Nedjah, Nadia
    Mourelle, Luiza de Macedo
    2007 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION, VOLS 1-10, PROCEEDINGS, 2007, : 3539 - +