SiP and WLP-CSP Trends: State-of-the-Art and Future Trends

被引：2
|
作者：
Yannou, Jean-Marc [1 ]
机构：
[1] NXP Semicond, F-14000 Caen, France
来源：
ESTC 2008: 2ND ELECTRONICS SYSTEM-INTEGRATION TECHNOLOGY CONFERENCE, VOLS 1 AND 2, PROCEEDINGS | 2008年
关键词：
D O I：
10.1109/ESTC.2008.4684312
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Wafer-Level Chip-Scale-Packaging (WLCSP) and System-in-Package (SiP) integration recently confirmed themselves as two long lasting increasing trends of the semiconductor industry. Even though they are driven by the same motivations of miniaturization and performance enhancement, they still follow parallel tracks, and rarely mix with one another in products. However, there is evidence that once reliability as well as some cost issues will be overcome thanks to innovation, future products will benefit from their combined differentiated advantages. We will present the state-of-the-art of both WLCSP and SiP, and we will then make clear under which conditions both these trend can be combined with cumulative benefits. We will then show new innovation trends aiming at fulfilling these conditions. Last, a few applications combining the benefits of WLCSP and SiP will be listed.
引用
收藏
页码：3 / 6
页数：4
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