An Improved Harmony Search Approach for Block Placement for VLSI Design Automation

Level of knowledge with the field for VLSI IC Design's Placement and Routing and in the area of Wireless Communication is rapidly evolving; Hence the process designing in the above fields is critical to assimilate a higher quantity of computation elements or nodes into a very compact size in VLSI Area and also the same is applicable in Wireless Communications to cover more number of nodes in a specific area. Prior to completing the placement, the physical and technical arranging of the computation elements or nodes in the chip area is planned, which is nothing more than Placement step and analogous with coverage of nodes in Wireless communication. Floorplanning must be done properly for reduce given placement area in physical ICDie. The proposed work suggests an ImprovisedHarmonySearch-IHS Optimization Algorithm, which is an Sequential combination of the HarmonySearch (HS) Algorithm and the most effective Particle Swarm Optimization (PSO) Algorithm to achieve the major objective of the VLSI Placement approach and applicable to the field of Wireless Communication. The aim at this point is to reduce the gap between the standard area of the benchmark circuit to the obtained area of the corresponding benchmark circuit. The MATLAB code for the ImprovisedHarmonySearch-IHS Algorithm is recreated, and discoveries are tested for better inspection using standard MCNC, or North Carolina Microelectronics Center benchmark circuits and suggest to adopt the corresponding results to the area of Wireless communication.