Dynamic machine learning-based heuristic energy optimization approach on multicore architecture

In the present era, energy is progressively turning into the major limitation in designing multicore chips. However, power and performance are the primary segments of energy, which are contrarily correlated in multicore architectures. This research primarily focused on optimizing energy level of multicore chips using parallel workloads by utilizing either power or execution advancement based on machine learning computation on dynamic programming. To do as such, the novel dynamic machine learning-based heuristic energy optimization (DML-HEO) algorithm has been designed and developed in this research on application-specific controllers to optimize energy-level on multicore architecture. Here DML-HEO is implemented on the controller to maximize the execution inside a fixed power spending plan or to limit the expended capacity to accomplish a similar pattern execution. The controller is additionally scalable as it does not bring about critical overhead due to the increase in quantity of cores. The strategy has been assessed utilizing controllers on a full-framework test system at lab-scale analysis. The experimental results demonstrate that our proposed DML-HEO system shows improving performance than the traditional system.