A new system-level simulator, eF(2)lowSim, is proposed to estimate the bit-accurate and cycle-accurate performance of eFlash compute-in-memory (CIM) accelerators for convolutional neural networks. The eF(2)lowSim can predict the inference accuracy by considering the impact of circuit nonideality such as program disturbance. Moreover, the eF(2)lowSim can also evaluate the system-level performance of dataflow strategies that have a significant impact on hardware area and performance of eFlash CIM accelerators. The simulator helps to find the optimal dataflow strategy of an eFlash CIM accelerator for each convolutional layer. It is shown that the improvement of area efficiency amounts to 26.8%, 21.2% and 17.9% in the case of LeNet-5, VGG-9 and ResNet-18, respectively.
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National University of Singapore,Department of Electrical and Computer EngineeringNational University of Singapore,Department of Electrical and Computer Engineering
Samarth Jain
Sifan Li
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National University of Singapore,Department of Electrical and Computer EngineeringNational University of Singapore,Department of Electrical and Computer Engineering
Sifan Li
Haofei Zheng
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National University of Singapore,Department of Electrical and Computer EngineeringNational University of Singapore,Department of Electrical and Computer Engineering
Haofei Zheng
Lingqi Li
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National University of Singapore,Department of Electrical and Computer EngineeringNational University of Singapore,Department of Electrical and Computer Engineering
Lingqi Li
Xuanyao Fong
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National University of Singapore,Department of Electrical and Computer EngineeringNational University of Singapore,Department of Electrical and Computer Engineering
Xuanyao Fong
Kah-Wee Ang
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National University of Singapore,Department of Electrical and Computer EngineeringNational University of Singapore,Department of Electrical and Computer Engineering