Machine learning investigation of high-k metal gate processes for dynamic random access memory peripheral transistor

被引：0

作者：

Kwon, Namyong ^{[1
]}

Bang, Joonho ^{[2
]}

Sung, Won Ju ^{[1
]}

Han, Jung Hoon ^{[1
]}

Lee, Dongin ^{[1
]}

Jung, Ilwoo ^{[1
]}

Park, Se Guen ^{[1
]}

Ban, Hyodong ^{[1
]}

Hwang, Sangjoon ^{[1
]}

Shin, Won Yong ^{[3
]}

Bae, Jinhye ^{[4
]}

Lee, Dongwoo ^{[2
]}

机构：

[1] Dept Memory Business, Samsung Elect, Samsungjeonja Ro, Hwasung Si 18448, South Korea

[2] Sungkyunkwan Univ, Sch Mech Engn, Seobu Ro, Suwon 16419, South Korea

[3] Yonsei Univ, Sch Math & Comp, Seoul 03722, South Korea

[4] Univ Calif San Diego, Dept Nano Engn, La Jolla, CA 92093 USA

来源：

APL MATERIALS | 2024年 / 12卷 / 02期

基金：

新加坡国家研究基金会;

关键词：

MULTIPLE IMPUTATION; CHAINED EQUATIONS; MISSING VALUES;

D O I：

10.1063/5.0191100

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

Dynamic random access memory (DRAM) plays a crucial role as a memory device in modern computing, and the high-k/metal gate (HKMG) process is essential for enhancing DRAM's power efficiency and performance. However, integration of the HKMG process into the existing DRAM technology presents complex and time-consuming challenges. This research uses machine learning analysis to investigate the relationships among the process parameters and electrical properties of HKMG in DRAM. The expectation-maximization imputation was utilized to fill in the missing data, and the Shapley additive explanations analysis was employed for the regression models to predict the electrical properties of HKMG. The impact of the process parameters on the electrical properties is quantified, and the important features that affect the performance of the HKMG transistor are characterized by using the explainable AI algorithm.

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页数：10

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