A high-load current low-dropout regulator with adaptive ESR compensation

This paper presents a dynamic pseudo equivalent series resistance (DPESR) zero-point compensation technology applied to high-current high-precision low-dropout (LDO) regulators. The DPESR circuit tracks the poles of the LDO output and adaptively generates zeros to improve stability. This compensation scheme allows the equivalent series resistance (ESR) of the output capacitor to be reduced to zero, enabling the use of miniaturized and low-ESR ceramic capacitors while reducing voltage peaks. In addition, a dynamic bias error amplifier (EA) is designed to improve transient response while ensuring that the LDO has adequate load and line regulation. The proposed LDO is designed and tested using the 0.18 mu m CMOS process. The test results demonstrated that the load and line regulations are 0.0028 mV/mA and 0.655 mV/V, respectively. When the input voltage VIN is 1.9 V, the output voltage VOUT is 1.5 V, and the load current is varied from 10 mA to 1.2 A, the undershoot and overshoot are 58 mV and 45 mV, respectively.