eBPFlow: A Hardware/Software Platform to Seamlessly Offload Network Functions Leveraging eBPF

被引:1
|
作者
Pacifico, Racyus D. G. [1 ]
Duarte, Lucas F. S. [2 ]
Vieira, Luiz F. M. [1 ]
Raghavan, Barath [3 ]
Nacif, Jose A. M. [2 ]
Vieira, Marcos A. M. [1 ]
机构
[1] Univ Fed Minas Gerais UFMG, Dept Comp Sci, BR-31270901 Belo Horizonte, Brazil
[2] Univ Fed Vicosa UFV, Dept Comp Sci, BR-36570900 Vicosa, Brazil
[3] Univ Southern Calif USC, Dept Comp Sci, Los Angeles, CA 90007 USA
关键词
Hardware; Engines; Parallel processing; Software; Field programmable gate arrays; Codes; Throughput; Networking functions virtualization; programmable data plane; eBPF; NetFPGA; PERFORMANCE;
D O I
10.1109/TNET.2023.3318251
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
NFV and SDN enable flexibility and programmability at the data plane. In addition, offloading packet processing to a hardware saves processing resources to compute other workloads. However, fulfilling requirements such as high throughput and low latency with a flexible and programmable data plane is challenging. This paper introduces eBPFlow, a platform for seamlessly accelerating network computation. It builds upon eBPF. eBPFlow combines flexibility and programmability in software with high performance using an FPGA. We implemented our system on the NetFPGA SUME, performing tests on a physical testbed. We built a range of NFs. Our results show that the eBPFlow supports offloading of NFs with throughput at the line rate, latency between 20 mu s and 40 mu s, communication with host, and consumption of 22 W. Moreover, eBPFlow processes 12.05 Mpps more than the kernel. eBPFlow has a throughput of 2.59 Gbps higher than the hXDP, a system similar to eBPFlow.
引用
收藏
页码:1319 / 1332
页数:14
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