A novel system-level modeling and design approach for high performance single-loop sigma-delta ( n-ary sumation Δ) modulators

被引:0
|
作者
Krishna, S. Vamsee [1 ]
Reddy, P. Sudhakara [2 ]
Reddy, S. Chandra Mohan [1 ]
机构
[1] Jawaharlal Nehru Technol Univ Anantapur, Ananthapuramu, India
[2] Sri Kalahasteeswara Inst Technol, Srikalahasti, India
关键词
Analog-to-digital conversion; Sigma Delta modulator; CMOS; ADC;
D O I
10.1108/IJIUS-06-2021-0051
中图分类号
TP24 [机器人技术];
学科分类号
080202 ; 1405 ;
摘要
Purpose This paper attempted a novel approach for system-level modeling and simulation of sigma-delta modulator for low-frequency CMOS integrated analog to digital interfaces. Comparative analysis of various architectures topologies, circuit implementation techniques are described with analytical procedure for effective selection of topologies for targeted specifications. Design/methodology/approach Virtual instruments are presented in labview environment to analyze the correlation of circuit-level non-ideal effects with key design parameters over sampling ratio, coarse quantizer bits and loop filter order. A fourth-order single-loop sigma-delta modulator is designed and verified in MATLAB simulink environment with careful selection of integrator weights to meet stable desired performance. Findings The proposed designed achieved SNDR of 122 dB and 20 bit resolution satisfying high-resolution requirements of low-frequency biomedical signal processing applications. Even though the simulation performed at behavioral level, the results obtained are considered as accurate, by including all non-ideal and non-linear circuit errors in simulation process. Originality/value Virtual instruments using labview environment used to analyze the correlation of circuit-level non-ideal effects with key design parameters over sampling ratio, coarse quantizer bits and loop filter order for accurate design.
引用
收藏
页码:48 / 60
页数:13
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