共 24 条
- [2] HOW GOOD IS TAPPED DELAY-LINE SIMULATION [J]. IEEE TRANSACTIONS ON COMMUNICATIONS, 1976, 24 (09) : 1029 - 1032
- [4] In-Stationary Tapped Delay Line Channel Modeling and Simulation [J]. 2020 14TH EUROPEAN CONFERENCE ON ANTENNAS AND PROPAGATION (EUCAP 2020), 2020,
- [6] ANALOG CMOS CONTINUOUS-TIME TAPPED DELAY-LINE CIRCUIT [J]. ELECTRONICS LETTERS, 1995, 31 (21) : 1793 - 1794
- [10] A Preliminary Result on Development of Analog Broadband Tapped Delay Line for L-Band Applications [J]. 2016 INTERNATIONAL SEMINAR ON INTELLIGENT TECHNOLOGY AND ITS APPLICATIONS (ISITIA): RECENT TRENDS IN INTELLIGENT COMPUTATIONAL TECHNOLOGIES FOR SUSTAINABLE ENERGY, 2016, : 357 - 361