Design of a New Hardware IP-HLS for Real-Time Image Chaos-Based Encryption

This paper presents a new approach for designing a lightweight and efficient prototype of encryption devoted to secure real-time embedded applications. The proposed approach is simple and it is based on two concepts, the first one is related to the design methodology in which it allows a good compromise between performances and time development, by using Vivado High Level synthesis (HLS). In counterpart, and as a second concept chaos-based theory is adopted for the design of a robust stream cipher encryption algorithm with good tradeoff between low resources and speed. Simulation and experimental results of image encryption demonstrate that the proposed design presents a good performances in terms of security, low resources and speed. Indeed, the solution can be embedded in many real-time applications namely video encryption.