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- [1] Wafer Thinning for High-Density Three Dimensional Integration _ 12-Inch Wafer-Level 3D-LSI Program at GINTI 2014 25TH ANNUAL SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE (ASMC), 2014, : 57 - 61
- [2] Via-free interconnection in quasi-hermetic wafer-level packaging for RF-MEMS applications and 3D integration TRANSDUCERS '07 & EUROSENSORS XXI, DIGEST OF TECHNICAL PAPERS, VOLS 1 AND 2, 2007,
- [3] A vertical wafer level packaging using through hole filled via interconnect by lift off polymer method for MEMS and 3D stacking applications 55TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, VOLS 1 AND 2, 2005 PROCEEDINGS, 2005, : 1094 - 1098
- [4] A novel, wafer-level stacking method for low-chip yield and non-uniform, chip-size wafers for MEMS and 3D SIP applications 58TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, PROCEEDINGS, 2008, : 314 - +
- [5] Study of the Radio Frequency (RF) performance of a Wafer-Level Package (WLP) with Through Silicon Vias (TSVs) for the integration of RF-MEMS and micromachined waveguides in the context of 5G and Internet of Things (IoT) applications: Part 1—validation of the 3D modelling approach Microsystem Technologies, 2020, 26 : 3799 - 3812
- [6] Study of the Radio Frequency (RF) performance of a Wafer-Level Package (WLP) with Through Silicon Vias (TSVs) for the integration of RF-MEMS and micromachined waveguides in the context of 5G and Internet of Things (IoT) applications. Part 2: parameterised 3D model and optimisation Microsystem Technologies, 2021, 27 : 223 - 234
- [7] Study of the Radio Frequency (RF) performance of a Wafer-Level Package (WLP) with Through Silicon Vias (TSVs) for the integration of RF-MEMS and micromachined waveguides in the context of 5G and Internet of Things (IoT) applications. Part 2: parameterised 3D model and optimisation MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2021, 27 (01): : 223 - 234
- [8] Study of the Radio Frequency (RF) performance of a Wafer-Level Package (WLP) with Through Silicon Vias (TSVs) for the integration of RF-MEMS and micromachined waveguides in the context of 5G and Internet of Things (IoT) applications: Part 1-validation of the 3D modelling approach MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2020, 26 (12): : 3799 - 3812