Optimal Pattern Retargeting in IEEE 1687 Networks: A SAT-based Upper-Bound Computation

A growing number of embedded instruments is being integrated into System-on-Chips for testing, monitoring, and several other purposes. To standardize their access protocols, the IEEE 1687 (IJTAG) standard has defined a flexible network infrastructure. Finding the shortest path in such networks requires a comprehensive search over a solution space, bounded by a limited number of time frames. This bound must be selected carefully, as it can neither be too large (to avoid unnecessary long execution time) nor too small (to avoid missing the optimal solution). Previous work was not efficiently applicable to all segments of IJTAG networks, with some providing unrealistic bounds and others having scope limitations or scalability issues. In this work, we present a new methodology for computing the upper-bound on the number of time frames using the Boolean Satisfiability Problem (SAT). Our proposed technique can also be customized to perfectly adapt to instruments access procedures, which in turn increases efficiency by reducing the time spent searching for required configurations. Results show the effectiveness of our work in computing the upper-bound for irregular benchmarks that are not constrained by a specific network design. This is achieved with a controlled increase in execution time, in contrast to previous work.