A 2.05-pJ/b 56-Gb/s PAM-4 VCSEL Transmitter with Piecewise Nonlinearity Compensation and Asymmetric Equalization in 40-nm CMOS

This work presents a quarter-rate 4-level pulse amplitude modulation (PAM-4) transmitter in 40-nm CMOS for vertical- cavity surface-emitting lasers (VCSELs). It adopts a thermometer code-based architecture with a 2-tap feed-forward equalizer (FFE) to independently control the gain and equalization strength of the top/middle/bottom (T/M/B) data slices for full compensation of VCSEL nonlinearities. Moreover, a pre-emphasis circuit is embedded within the continuous-time linear equalizer (CTLE) not only to mitigate the data eye skew caused by the VCSEL's asymmetric responses to rising and falling transitions, but also to extend the overall transmitter bandwidth. Optical measurement results demonstrate that with the 56-Gb/s PAM-4 data rate and 2.05-pJ/bit efficiency, the proposed piecewise nonlinearity compensation scheme improves the average sub-eye height/width and the ratio-of-level mismatch ( RLM) by 14%/12% and 38%, respectively, and the asymmetric equalization technique reduces the horizontal eye skew by 63%.