An Efficient 76-77 GHz CMOS Receiver on Silicon for Automotive Front-end RADAR Applications

Recently, automotive RADAR sensors are widely demanded in many intelligent transport vehicles for providing a safe and comfortable environment. This paper presents a novel approach to design an integrated RAdio wave Detection And Ranging (RADAR) receiver for long-range automotive applications operating at frequency range 76-77 GHz. The proposed circuit employs a differential architecture of receiver which consists of a three-stage cascaded / cascoded Low Noise Amplifier (LNA) for very high power gain (39dB), a low power Source Degeneration Doubled Balanced Mixer (SDDBM) and an Intermediate Frequency(IF) filter. This configuration provides excellent stability with a minimum chip size that is best suitable for integrated automotive RADAR used for detecting front collision. A low voltage, low power combined mixer and IF filter for receiver system is also presented for filtering out required band frequency from received RF signal. This combined circuit is designed for power supply of 1V with a power dissipation of 4.9 mW. RC-extracted results are obtained on cadence environments at 45 nm CMOS technology and are compared these with previous state-of-the-art research. Optimized layout size of the LNA, mixer and IF filter are 580x413 mu m(2), 218x240 mu m(2), 240x265 mu m(2) respectively. The scaling results are showing the gilt-edge of the design over existing techniques.