共 50 条
- [1] Architecting an Energy-Efficient DRAM System for GPUs [J]. 2017 23RD IEEE INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA), 2017, : 73 - 84
- [2] TCache: An Energy-Efficient DRAM Cache Design [J]. 2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2017,
- [3] Exploring Energy-Efficient DRAM Array Organizations [J]. 2011 IEEE 54TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2011,
- [4] Energy-Efficient Hybrid DRAM/NVM Main Memory [J]. 2015 INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURE AND COMPILATION (PACT), 2015, : 492 - 493
- [5] Fine-Grained DRAM: Energy-Efficient DRAM for Extreme Bandwidth Systems [J]. 50TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO), 2017, : 41 - 54
- [6] Robust energy-efficient adder topologies [J]. 18TH IEEE SYMPOSIUM ON COMPUTER ARITHMETIC, PROCEEDINGS, 2007, : 16 - +
- [7] Exploring DRAM Organizations for Energy-Efficient and Resilient Exascale Memories [J]. 2013 INTERNATIONAL CONFERENCE FOR HIGH PERFORMANCE COMPUTING, NETWORKING, STORAGE AND ANALYSIS (SC), 2013,
- [9] Exploiting Latency and Error Tolerance of GPGPU Applications for an Energy-efficient DRAM [J]. 2019 49TH ANNUAL IEEE/IFIP INTERNATIONAL CONFERENCE ON DEPENDABLE SYSTEMS AND NETWORKS (DSN 2019), 2019, : 362 - 374