A Feedforward Controlled Digital Low-Dropout Regulator With Weight Redistribution Algorithm and Body Voltage Control for Improving Line Regulation With 99.99% Current Efficiency and 0.5-mV Output Voltage Ripple

被引：6

作者：

Chen, Bo-Hao ^{[1
]}

Wu, Tzu-Ying ^{[1
]}

Zheng, Kuo-Lin ^{[2
]}

Chen, Ke-Horng ^{[1
]}

Lin, Ying-Hsi ^{[3
]}

Lin, Shian-Ru ^{[3
]}

Tsai, Tsung-Yen ^{[3
]}

机构：

[1] Natl Yang Ming Chiao Tung Univ, Inst Elect & Comp Engn, Hsinchu 30010, Taiwan

[2] Chip GaN Power Semicond Corp, Hsinchu 300, Taiwan

[3] Realtek Semicond Corp, Hsinchu 300, Taiwan

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2023年 / 58卷 / 02期

关键词：

Binary search algorithm; body voltage control (BVC); digital low dropout (DLDO); feedforward control (FFC) technique; line regulation; power supply rejection (PSR); CONVERTERS; LDO;

D O I：

10.1109/JSSC.2022.3185158

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this article, a digital LDO with a feedforward controller and weight redistribution algorithm (WRA) for line regulation improvement is proposed. The proposed digital low dropout (DLDO) uses a feedforward path to obtain the information of V-IN and applies WRA and body voltage controller to adjust I-OUT to minimize the output voltage ripple Delta V-OUT. Different from conventional freeze mode, the feedforward control (FFC) with low quiescent current can keep Delta V-OUT < 0.5 mV in steady state and Delta V-OUT < 4 mV during line transient. In order for the feedback loop to rapidly wake up, the transient pump circuit is used to reduce the undershoot to less than 30 mV in the case of load change from 1 to 200 mA. Due to low quiescent current in the FFC, the DLDO achieves peak current efficiency of 99.99% at heavy loads.

引用

页码：486 / 496

页数：11