Extremely High-κ Hf0.2Zr0.8O2 Gate Stacks Integrated Into Eight Stacked Ge0.95Si0.05 Nanowires and Nanosheets nFETs to Boost ION

被引：2

作者：

Chen, Wei-Jen ^{[1
]}

Liu, Yi-Chun ^{[1
]}

Chen, Yun-Wen ^{[1
]}

Chen, Yu-Rui ^{[1
]}

Lin, Hsin-Cheng ^{[1
]}

Tu, Chien-Te ^{[1
]}

Huang, Bo-Wei ^{[1
]}

Liu, C. W. ^{[2
,3
]}

机构：

[1] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 10617, Taiwan

[2] Grad Inst Elect Engn, Grad Inst Photon & Optoelect, Dept Elect Engn, Taipei 10617, Taiwan

[3] Natl Taiwan Univ, Grad Sch Adv Technol, Taipei 10617, Taiwan

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2023年 / 70卷 / 12期

关键词：

GeSi; high-k gate stacks; highly stacked channels; nanosheets; nanowires; wet etching; PERFORMANCE;

D O I：

10.1109/TED.2023.3315685

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

By taking advantage of extremely high dielectric constant (kappa) of 47, the Hf(0.2)Zr(0.8)O(2 )gate stacks are integrated into the eight stacked high mobility Ge0.95Si0.05 channels with low thermal budget (<= 450 degrees C) to significantly enhance the I-ON. Isotropic wet etching by H2O2 and HNO3 serve well during the channel release of nanowires and nanosheets, respectively. The simulated kappa versus Zr concentration in HZO can show that the kappa can have a peak value at Zr concentration around 80%. The eight stacked Ge0.95Si0.05 nanowires and nanosheets with Hf0.2Zr0.8O2 gate stacks achieve the record high ION per footprint of 9200 mu A and record high ION per stack of 360 mu A at VOV = VDS = 0.5 V, respectively, among all Si/GeSi/Ge 3-D nFETs. Moreover, the potential gate delay improvement by combining the extremely high-kappa gate stacks and large floor number is studied by TCAD simulation using industrial device structures.

引用

页码：6673 / 6679

页数：7