A Wide-Load-Range and High-Slew Capacitor-Less NMOS LDO With Adaptive-Gain Nested Miller Compensation and Pre-Emphasis Inverse Biasing

被引：11

作者：

Park, Hyunjun ^{[1
]}

Jung, Woojoong ^{[1
]}

Kim, Minsu ^{[1
]}

Lee, Hyung-Min ^{[1
]}

机构：

[1] Korea Univ, Sch Elect Engn, Seoul 02841, South Korea

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2023年 / 58卷 / 10期

关键词：

Adaptive-gain nested Miller compensation; capacitor-less LDO; low-dropout regulator (LDO); NMOS LDO; pre-emphasis inverse (PI) biasing; stability; transient response; LOW-DROPOUT REGULATOR; HIGH PSR;

D O I：

10.1109/JSSC.2023.3279843

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This article proposes an output capacitor-less NMOS low-dropout regulator (LDO) using wide-range adaptive gain nested Miller compensation (WAG-NMC) and pre-emphasis inverse (PI) biasing. Due to WAG-NMC, the LDO can provide a wide range of load current (I-LOAD) from 0.1 to 300 mA while maintaining sufficiently high phase margin (PM) above 60(? )at all I-LOAD conditions. WAG-NMC also extends a loop bandwidth (BW) up to 17.5 MHz with using only small compensation capacitors (C-C) of 6.3 pF in total. Moreover, PI biasing enhances a slew rate (SR) at the gate of the NMOS power transistor by injecting an adaptive PI current into a supersource follower (SSF), which further improves transient response. The proposed LDO fabricated in a 180-nm CMOS process was fully integrated with an on-chip load capacitor (C-L) of 100 pF. The LDO ensures small undershoot and overshoot of 48 and 59 mV, respectively, against large ?I-LOAD of 299 mA due to wide-BW and high SR. The proposed LDO also achieves a best figure of merit (FoM) of 1.72 ps among the state of the arts.

引用

页码：2696 / 2708

页数：13