Doping-Free Complementary Metal-Oxide-Semiconductor Inverter Based on N-Type and P-Type Tungsten Diselenide Field-Effect Transistors With Aluminum-Scandium Alloy and Tungsten Oxide for Source/Drain Contact

被引:3
|
作者
Kawanago, Takamasa [1 ]
Kajikawa, Ryosuke [2 ]
Mizutani, Kazuto [2 ]
Tsai, Sung-Lin [2 ]
Muneta, Iriya [2 ]
Hoshii, Takuya [2 ]
Kakushima, Kuniyuki [2 ]
Tsutsui, Kazuo [1 ]
Wakabayashi, Hitoshi [2 ]
机构
[1] Tokyo Inst Technol, FIRST, Yokohama, Kanagawa 2268502, Japan
[2] Tokyo Inst Technol, Dept Elect & Elect Engn, Yokohama, Kanagawa 2268502, Japan
关键词
2D-FETs; CMOS inverter; doping-free; WSe2; WSE2; ELECTRONICS; TECHNOLOGY; SILICON;
D O I
10.1109/JEDS.2022.3224206
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this study, we experimentally demonstrated concepts for realizing doping-free Tungsten Diselenide (WSe2) complementary metal-oxide-semiconductor (CMOS) inverter by developing alloys and compound metals used as source/drain (S/D) contacts. Aluminum - scandium alloy (AlSc) and tungsten oxide (WOx)-based S/D contacts enable efficient electron and hole injection into WSe2 for n-type and p-type FET operation because the work function (WF) of AlSc and WOx are aligned to neighboring the conduction and valence band edge of WSe2, respectively. A dual-gate bias architecture is used to improve electrical characteristics of FETs and enhance CMOS inverter performance after device fabrication. By utilizing AlSc and WOx-based S/D contacts in conjunction with the dual-gate bias architecture, our fabricated WSe2 CMOS inverter realized a higher gain at V-dd of 1 V or higher than those in the literatures. Furthermore, the fabricated WSe2 CMOS inverter is operated at a power supply voltage (V-dd) of as low as 0.5 V. This study paves the way towards research and development of transition metal dichalcogenides-based devices and circuits.
引用
收藏
页码:15 / 21
页数:7
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