Ripple Attenuation and Aliasing Suppression in Multisampling Digitally Controlled Inverters

被引:2
|
作者
Yu, Jian [1 ]
Niu, Aohui [1 ]
Shi, Zhiyuan [1 ]
Zhou, Le [1 ]
Shen, Renhui [1 ]
机构
[1] Shanxi Univ, Sch Automat & Software Engn, Taiyuan 030000, Peoples R China
关键词
Voltage control; Power harmonic filters; Delays; Inverters; Harmonic analysis; Capacitors; Control systems; Voltage source inverters; Aliasing; control delay; voltage source inverters (VSIs); multisampling; low-order harmonics; VOLTAGE-SOURCE CONVERTERS;
D O I
10.1109/ACCESS.2024.3367284
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The application of multisampling technology in voltage-source inverters (VSIs) systems can significantly reduce the control delay and break the bandwidth limitations of traditional synchronous sampling schemes. However, when sampling the capacitor voltage, the high-frequency ripple is introduced into the control loop, leading to the local vertical crossing (VC) phenomenon. Previous studies have demonstrated that a moving average filter (MAF) or improved repetitive filter (IRF) can effectively remove the high-frequency ripple. However, they introduce additional phase lag, which undermines the advantages of multisampling technology in terms of phase boost. The approach of spectrum analysis can be used to study the impact of voltage ripple. The results indicate that after modulation, the output signal contains low-frequency harmonics, and the superposition of the ripple makes the modulation process more susceptible to saturation. Therefore, a 20k ripple notch filter (RNF) is proposed to attenuate the ripple signal while introducing a more minor phase lag. Additionally, a 90 degrees phase shift filter is proposed to suppress the aliasing signals generated in the system. Finally, the effectiveness of the proposed methods is verified through the experimental test of a 10kW single-phase VSI system.
引用
收藏
页码:28598 / 28611
页数:14
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