Simplified selective harmonic elimination PWM for three-level five-phase T-NPC inverter

被引:2
|
作者
Bennacer, Nassim Rayane [1 ,2 ]
Bentafat, Mahdi [1 ]
Benachour, Ali [1 ]
Sekhri, Sabri [1 ]
Berkouk, El Madjid [1 ]
机构
[1] Ecole Natl Polytech, LCP Lab, Algiers, Algeria
[2] Ecole Natl Polytech, LCP Lab, Algiers 16200, Algeria
关键词
CMV; five phase; implementation; multilevel converter; Selective harmonic elimination; STM32; THD; CONVERTERS; MODULATION; STRATEGY;
D O I
10.1002/cta.3645
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a selective harmonic PWM strategy (HSE-PWM) to control a five-phase three-level T-NPC inverter. The proposed method aims to reduce switching losses and directly eliminate specific orders of harmonics, while also controlling the fundamental magnitude. MATLAB/Simulink simulations are conducted using an RL load, and the implementation is tested using a simplified method on an STM32F4 controller board. Experimental tests are then carried out to validate the simulation results. Additionally, power losses and efficiency are studied using Plecs software. The paper explores four different cases of switching angles number and proposes three SHE methods: a simple SHE based on Newton Raphson's method, SHE with current THD optimization, and SHE with common mode voltage (CMV) optimization using the PSO algorithm. The proposed methods provide complete control over the fundamental of the output voltage and the selected harmonics while reducing switching losses. A comparison is carried out in terms of voltage waveform, maximum CMV, fundamental magnitude, total harmonic distortion (THD), and power efficiency for the three methods. The paper concludes that the proposed modulation can be useful in high-power applications.
引用
收藏
页码:4334 / 4347
页数:14
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