Vector-Matrix-Multiplication Acceleration with Multi-Input Pr0.7Ca0.3MnO3 based RRAM for Highly Parallel In-Memory Computing

被引：1
|
作者：
Sakhuja, Jayatika [1 ]
Saraswat, Vivek [1 ]
Lashkare, Sandip [1 ]
Ganguly, Udayan [1 ]
机构：
[1] Indian Inst Technol, Mumbai 400076, India
来源：
2023 7TH IEEE ELECTRON DEVICES TECHNOLOGY & MANUFACTURING CONFERENCE, EDTM | 2023年
关键词：
IMC; VMM; RRAM (memristor); PCMO;
D O I：
10.1109/EDTM55494.2023.10103016
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this work, we propose multi-input memristorbased vector-matrix-multiplication (VMM) acceleration in memristor crossbar arrays via bitgrouping. First, we demonstrate parallel processing and multiply-and-accumulate(MAC), which is fundamental to VMM, using standard 2-terminal(T) PCMO-RRAM devices. Second, we introduce 3T PCMO-RRAM with two-input/one-output terminals. Two input terminals per RRAM enhance parallel computation by grouping MAC input bits in single device. Lastly, computation with two 3T-RRAMs demonstrating 16 possible outcomes with high MAC linearity (average 3% deviation) is shown.
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页数：3
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