Design and Implementation of Energy-Efficient Binary Neural Networks Using Adiabatic Quantum-Flux-Parametron Logic

被引:3
|
作者
Yamauchi, Tomoharu [1 ]
San, Hao [1 ]
Yoshikawa, Nobuyuki [2 ]
Chen, Olivia [3 ,4 ]
机构
[1] Tokyo City Univ, Dept Elect Elect & Commun Engn, Tokyo 1588557, Japan
[2] Yokohama Natl Univ, Dept Elect & Comp Engn, Yokohama 2408501, Japan
[3] Tokyo City Univ, Dept Comp Sci, Tokyo 1588557, Japan
[4] JST, PRESTO, Saitama 3320012, Japan
关键词
Logic gates; Josephson junctions; Clocks; Superconducting logic circuits; Neurons; Standards; Energy dissipation; Adiabatic logic; AQFP; binary neural network; superconducting digital circuits;
D O I
10.1109/TASC.2023.3243180
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for future energy-efficient, high-performance information processing systems. It has significantly low power dissipation thanks to the adiabatic switching of Josephson junctions. In this paper, we introduce an AQFP-based binary neural network (BNN) design methodology utilizing an in-memory computing scheme, analog accumulation, and a crossbar structure. The proposed design can effectively resolve the memory issue in superconducting digital circuits by significantly reducing memory usage in a non-Von Neumann fashion compared to conventional neural networks. As a proof-of-concept, we designed and implemented an 8 x 8 AQFP BNN using the proposed design methodology targeted the AIST 10kA/cm(2) 4-layer niobium process. The Josephson junction count and energy dissipation of the proposed 8 x 8 BNN design are 2236 and 11.18 aJ, respectively.
引用
收藏
页数:5
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