A New Adaptive POL Converter Controller Design to Improve Bus Voltage Stability for DC Microgrid Application Conception d’un nouveau contrôleur de convertisseur POL adaptatif pour améliorer la stabilité de la tension de bus pour les applications de micro-réseau à courant continu

被引:1
|
作者
Rastogi, Rohit Kumar [1 ]
Tripathy, Manoj [1 ]
机构
[1] Indian Inst Technol Roorkee, Dept Elect Engn, Roorkee 247667, India
来源
IEEE CANADIAN JOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING | 2023年 / 46卷 / 04期
关键词
Control; dc microgrid (dc MG); dc/dc converters; stability; CONSTANT POWER LOADS; STABILIZATION; PERFORMANCE; CRITERION; SYSTEMS;
D O I
10.1109/ICJECE.2023.3288928
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This article describes an adaptive resonance frequency extraction-based dc-dc converter controller to stabilize the dc microgrid (dc MG). The dc MG becomes prone to instability due to the excessive application of constant power loads (CPLs) and their variations. Under such conditions, the source-side control techniques for the stabilization of dc MG systems fail. Therefore, to stabilize dc MG systems, the load-side control methods are alternate approaches to improve the stability of dc MG. In this article, a new feed-forward control technique is proposed to improve the stability of the dc MG. In the proposed method, the input impedance of the load-side dc-dc converter is modified by the phase compensation method without realizing a total magnitude separation $(Z_{\text{os}}$ and $y_{\text{iL}}=1/Z_{\text{iL}}) $ to stabilize the dc MG system. The investigation analyzes the possibility of instability across the operational frequency spectrum. Based on that, a new feed-forward loop compensator is derived, which is a function of the center frequency to make it adaptive to load variations. After that, the derived compensator is realized for voltage mode control of the buck converter. It reduces the dc MG bus voltage oscillations without increasing system complexity and dissipation. The results of the MATLAB $<^>\text{{\textregistered}}$ simulation are compared with suggested and existing control methods. Moreover, it was discovered that the ripple in bus voltage decreased from 5.28% to 0.7%. And the settling durations of dc bus voltage and current were lowered from 0.5 and 0.25 s to 0.25 and 0.16 s, respectively.
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页码:288 / 297
页数:10
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