Transitioning to Chisel in University Education: Experiences and Lessons Learned

Hardware description languages are essential for specifying, designing, and verifying digital systems. VHDL and Verilog have been the predominant hardware description languages, but they present educational challenges due to their steep learning curve and low-level nature. Conversely, Chisel, a language embedded in Scala, offers a high-level, software-like approach to hardware design. This paper presents our experience at the Technical University of Denmark (DTU) transitioning from VHDL to Chisel for selected courses and projects. We discuss the challenges faced in using VHDL and Verilog as entry-level languages, and we highlight the benefits and lessons learned from the transition to Chisel, including improved accessibility and efficiency in learning hardware design. This paper contributes to the ongoing discussion on languages for hardware description in education and provides insights into the advantages of adopting Chisel as an alternative language. The transition resulted in overwhelmingly positive outcomes, with improved student understanding, productivity, satisfaction, and performance.