Towards Asynchronously Triggered Spiking Neural Network on FPGA for Event-based Vision

In this paper, the design and implementation of an asynchronously-triggered spiking neuron tailored for FPGA implementations is presented. The asynchronous triggering mechanism is designed to effectively preserve the spatial-temporal information captured by event-based vision sensors. Neurons of the target network model are implemented using the configurable logic blocks of an FPGA spatially and communicate through an asynchronous handshaking protocol. Without using a global clock to synchronize operations of the neurons, energy consumption and inference latency are minimized. The proposed design is composable and scalable for applications with different spiking neural network (SNN) configurations. Experimental results show that the proposed design is able to achieve 95.76% accuracy on the N-MNIST dataset while consuming less than 1 mW dynamic power on an Xilinx ZCU102 board.