Polar-coded forward error correction for MLC NAND flash memory

With the ever-growing storage density, high-speed, and low-cost data access, flash memory has inevitably become popular. Multi-level cell(MLC) NAND flash memory, which can well balance the data density and memory stability, has occupied the largest market share of flash memory. With the aggressive memory scaling, however, the reliability decays sharply owing to multiple interferences. Therefore, the control system should be embedded with a suitable error correction code(ECC) to guarantee the data integrity and accuracy. We proposed the pre-check scheme which is a multi-strategy polar code scheme to strike a balance between reasonable frame error rate(FER) and decoding latency. Three decoders namely binaryinput, quantized-soft, and pure-soft decoders are embedded in this scheme. Since the calculation of soft loglikelihood ratio(LLR) inputs needs multiple sensing operations and optional quantization boundaries, a 2-bit quantized hard-decision decoder is proposed to outperform the hard-decoded LDPC bit-flipping decoder with fewer sensing operations. We notice that polar codes have much lower computational complexity compared with LDPC codes. The stepwise maximum mutual information(SMMI) scheme is also proposed to obtain overlapped boundaries without exhausting search. The mapping scheme using Gray code is employed and proved to achieve better raw error performance compared with other alternatives. Hardware architectures are also given in this paper.