共 12 条
- [1] Fault Modeling and Test Algorithm Development for Static Random Access Memories. R.Dekker,F.Beenker,A.Thijssen. IEEE International Test Conference . 1988
- [2] A parallel built-in self-diagnostic method for embedded memory arrays. HuangDer-Cheng,JoneWen-Ben. IEEE Trans. onComputer-AidedDesign ofIntegratedCircuits andSystems . 2002
- [3] A programmable built-in self-test core for embedded memories. HuangChih-Tsun,HuangJing-Reng,WuCheng-Wen. Proc. ofDesignAutoConf. (ASP-DAC 2000) . 2000
- [4] Diagnostic testing of embedded memories using BIST. Bergfeld T J,Niggemeyer D,Rudnick E M. Proc. Design, Automation and Test in Europe Conference and Exhibition2000 . 2000
- [5] Diagnostic testing of embedded memories using BIST. Bergfeld T J,Niggemeyer D,Rudnick E M. Proc. Design, Automation and Test in Europe Conference and Exhibition2000 . 2000
- [6] An efficientBIST method for testing of embeddedSRAMs. TehranipourM H,NavabiZ,FakhraieS M. The2001IEEE Int.Conf. onCircuits andSystems,ISCAS2001 .
- [7] TestingSemiconductorMemories,Theory andPractice. Goor, van deA J. JohnWiley&Sons . 1991
- [8] March tests for word-oriented memories. Goor van de,A J,Tlili B S. Proc. ofDesign,Auto andTest inEurope . 1998
- [9] Design and test of large embedded memories:An overview. RajsumanR. IEEE Design&Test ofComputers . 2001
- [10] ramses: a fast memory fault simulator. WuChi-Feng,HuangChih-Tsun,WuCheng-Wen. DFT ’’99,InternationalSymp onDefect andFaultTolerance inVLSI Systems . 1999