Design of Digital Tunneling-Magnetoresistance Sensors with 260pT/√Hz (@1Hz) Noise Density

被引：0

作者：

Wang, Shanshan ^{[1
]}

Di, Xinpeng ^{[3
]}

Wang, Pengjun ^{[2
]}

Ji, Zexin ^{[1
]}

Zhang, Xiaowei ^{[1
]}

机构：

[1] Ningbo Univ, Fac Elect Engn & Comp Sci, Ningbo 315211, Peoples R China

[2] Wenzhou Univ, Coll Elect & Elect Engn, Wenzhou 325035, Peoples R China

[3] Shanghai Aerosp Control Technol Inst, Shanghai, Peoples R China

来源：

IEICE ELECTRONICS EXPRESS | 2025年

基金：

中国国家自然科学基金;

关键词：

interface circuit; tunneling magnetoresistance; low frequency noise;

D O I：

10.1587/elex.22.20250048

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Micro-magnetometers with low-noise digital output are extensively utilized in both military and civilian applications. In this work, we propose a method that combines chopping modulation technology with interface ASIC design to effectively attenuate low-frequency 1/f noise. Magnetic shielding and chopping modulation are applied to tunneling magnetoresistance (TMR) sensors. The high-precision interface ASIC incorporates a ripple reduction circuit and utilizes a switched-capacitor sigma-delta topology. The ASIC chip for the TMR magnetometer was fabricated using a 0.35 mu m CMOS process provided by Shanghai Huahong company. The active area of the interface ASIC is 3.2mm x 3mm. For testing, the interface chip, which includes a three-channel sigma-delta ADC, was integrated with the TMR sensor on the same PCB. The TMR sensor and ASIC operate with a total power consumption of 27mW under a single 5V power supply. The integrated TMR sensor system achieves a resolution of 260pT/root Hz across the signal bandwidth, with a nonlinearity of 0.11% and an input range of +/- 100 mu T.

引用

页数：7