A ΣΔ-Modulated Linear-in-dB Attenuator for On-Chip Power Detection with 0.12 dB Resolution in RF SOI CMOS Switch Technology

被引：1
|
作者：
Hsu, Ting-Li [1 ]
Solomko, Valentyn [2 ]
Hagelauer, Amelie [3 ]
机构：
[1] Tech Univ Munich, Chair Micro & Nanosyst Technol, Munich, Germany
[2] Infineon Technol AG, Neubiberg, Germany
[3] Fraunhofer EMFT Inst Elect Microsyst & Solid Stat, Munich, Germany
来源：
2024 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM, RFIC 2024 | 2024年
关键词：
attenuator; CMOS attenuator; sub; 6; GHz; variable attenuator;
D O I：
10.1109/RFIC61187.2024.10600013
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this work, an innovative scheme to boost the resolution of the variable radio-frequency (RF) attenuator is proposed and examined. The attenuator stage modulated by a first-order sigma-delta modulator (S.M) shows a linear-in-dB attenuation profile for the average RF power with high resolution. The proposed attenuator provides a low-power solution for accurate on-chip power measurement with zero quiescent current. The implemented attenuator shows an effective attenuation tuning step size of 0.12 dB from 700MHz to 6 GHz with a power consumption of only 41.4 mu W. The device is designed and fabricated in 90nm RF SOI CMOS switch technology.
引用
收藏
页码：79 / 82
页数：4
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