Analysis of Influencing Factors on Multilevel Storage Performance in Phase-Change Random Access Memory

被引：0
|
作者：
Wang, Zhiyu [1 ]
Cai, Daolin [2 ]
机构：
[1] Jiangnan Univ, Sch Integrated Circuits, Wuxi 214122, Peoples R China
[2] East China Normal Univ, Sch Integrated Circuits, Shanghai 200241, Peoples R China
来源：
ELECTRONICS | 2024年 / 13卷 / 19期
基金：
中国国家自然科学基金;
关键词：
PCRAM; multilevel storage; C-GST; Partial-RESET; P&V;
D O I：
10.3390/electronics13193802
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
In response to the growing demand for advanced memory technologies, this study investigates a 4 Mb phase-change memory (PCRAM) chip employing a carbon-doped Ge2Sb2Te5 (C-GST) dielectric material to achieve multistage storage. The Partial-RESET programming and verification (P&V) method was utilized to effectively create intermediate-resistance states, facilitating multilevel storage. The study focuses on optimizing the key parameters affecting the P&V method to enhance the precision and efficiency of reaching intermediate resistance values. Through comprehensive experimentation on the PCRAM array, this work evaluates the performance of multilevel storage, providing insights into the potential for scalable, high-density memory applications.
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页数：8
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