A Monolithic Active Pixel Sensor with a novel readout architecture for vertex detector in particle physics

被引:0
|
作者
Dai, Wenjie [1 ]
Xiao, Le [1 ]
Zhang, Guoxiang [1 ]
Zhou, Zijie [1 ]
You, Bihui [1 ]
Sun, Xiangming [1 ]
Huang, Guangming [1 ]
Gao, Chaosong [1 ]
Zhao, Cong [1 ]
Yang, Ping [1 ]
Liu, Jiajia [1 ]
Guo, Di [1 ]
Lu, Yunpeng [2 ]
Zhou, Yang [2 ]
Zhang, Ying [2 ]
Xie, Lirong [3 ]
Yang, Ming [3 ]
Yi, Liwen [1 ]
Tong, Qiaomu [1 ]
Feng, Wanhan [1 ]
Tian, Ziyang [1 ]
机构
[1] Department of Physics, Central China Normal University, Hubei, Wuhan,430079, China
[2] Institute of High Energy Physics, 19B Yuquan Road, Beijing,100049, China
[3] School of Physical Science and Technology, Guangxi University, Nanning,530004, China
基金
中国国家自然科学基金;
关键词
CMOS integrated circuits - Hadrons - Monolithic microwave integrated circuits - Particle detectors - Photons - Readout systems - Remote sensing - Solid-state sensors;
D O I
10.1088/1748-0221/20/03/C03019
中图分类号
学科分类号
摘要
We present the design and preliminary test results of a MAPS sensor prototype MIC6_V1 based on a 55 nm Quad-well CMOS Image Sensor process for the CEPC vertex detector. In order to achieve high-spatial resolution, fast readout, and low power consumption, A new node-based, data-driven, parallel readout architecture was implemented in MIC6_V1. The integration time is 5 μ s, and by sharing VCO in a 4×2 pixel group (super pixel group), the hit arrival time resolution can reach 10 ns. The pixel size of MIC6_V1 is 23.6 μ m × 20 μ m. The pixel matrix is 64 rows by 64 columns, and the size of MIC6_V1 is 2.8mm × 2.8 mm. The readout node of each super pixel group in the double-column can transmit hit information of 8 pixels in parallel at a speed of 640 MHz. The power consumption of the chip is 15.6 mW. © 2025 IOP Publishing Ltd and Sissa Medialab. All rights, including for text and data mining, AI training, and similar technologies, are reserved.
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