ISOLATION TECHNIQUE FOR HIGH SPEED BIPOLAR INTEGRATED CIRCUITS.

A new oxide-wall isolation technique, called insulation by oxidized porous silicon (IPOS) was developed for high speed bipolar ICs. The IPOS technique offers larger packing density, lower parasitic capacitance and higher breakdown voltage than the conventional P-N junction isolation technique. The IPOS technique is based on a formation of porous silicon by an anodic reaction of silicon in concentrated hydrofluoric acid solution. Since the oxidation rate of porous silicon is much larger than that of bulk silicon, oxidation time required to form a thick oxide film is very short. A two-stage EF-NTL gate is fabricated by using the IPOS technique. A 0. 3 ns/gate propagation delay time is obtained at 6 mW/gate power dissipation.