Inverter reduction algorithm for super fine-grain parallel processing

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NTT Information and Communication, Systems Lab, Yokosuka-shi, Japan ^{[1
]}

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IEICE Trans Fund Electron Commun Comput Sci | 1600年 / 3卷 / 487-493期

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D O I：

Proceedings of the 1996 9th Karuizawa Workshop on Circuits and Systems, KWS

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摘要：

Parallel algorithms

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